연구분야
LLRF
(Low Level Radio Frequency)
Research Plans
-Digital RF stabilization system
-Xilinx Zynq-7000 based
-High reliability with excellent performance
-EPICS ready
-Configurable to specific accelerator’s needs
- Low Level Radio Frequency spec(RF Board)
| Channel | Parameter | Unit | Value | Condition |
|---|---|---|---|---|
| RF Channel | Frequency | MHz | Mentioned Individually | |
| RF Reference | MHz | 81.25 | ||
| Number of RF Input Channel |
4 | 3 RF Input (SMA) 1 RF Reference (SMA) |
||
| Number of RF Output Channel |
1 | for Rebuncher, QWR, HWR | ||
| 2 | for RFQ | |||
| Input Impedance | Ohm | 50 | ||
| RF Output Range | dBm | -40 ~ 0 | ||
| RF Input Range | dBm | -40 ~ 0 | Limiter@10 dBm | |
| RF Reference Input Range | dBm | -10 ~ 5 | Limiter@10 dBm | |
| RF Input Monitoring Port | 4 | SMA | ||
| Programmable Attenuator | dB | ~30 | Digitally Controllable (min step ≦ 1dB, min attenuation : 0dB) |
|
| Crosstalk | dB | <-60 | Among RF Inputs | |
| DAC | Resolution | bits | ≧16 | |
| ADC | Sampling | MSPS | ≧125 | JESD204B or Serial LVDS |
| Resolution | bits | ≧16 | ||
| PLL | RMS Jitter | fs | < 90 | |
| Aux ADC | Sampling | MSPS | ~1 | |
| Resolution | bits | 12 | ||
| Channel | ≧2 | |||
| Aux DAC | Resolution | bits | 12 | |
| Channel | 1 |